1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com hv9925 features programmable output current to 50ma pwm dimming / enable universal 85 - 264vac operation fixed off-time buck converter internal 475v power mosfet over-temperature protection with hysteresis applications decorative lighting low power lighting ?xtures ? ? ? ? ? ? ? ? general description the hv9925 is a pulse width modulated (pwm) high-ef?ciency led driver control ic with pwm dimming capabilities. it allows ef?cient operation of high brightness led strings from voltage sources ranging up to 400vdc. the hv9925 includes an internal high-voltage switching mosfet controlled with a ?xed off-time (t off ) of approximately 10.5s. the led string is driven at constant current, thus providing constant light output and enhanced reliability. selecting a value of a current sense resistor can externally program the output led current of the hv9925. the peak current control scheme provides good regulation of the output current throughout the universal ac line voltage range of 85 to 264vac or dc input voltage of 20 to 400v. the hv9925 is designed with a built in thermal shutdown to prevent excessive power dissipation in the ic. typical application circuit programmable-current led lamp driver ic with pwm dimming
2 hv9925 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com ordering information device package option 8-lead soic (w/heat slug) 4.90x3.90mm body 1.70mm height (max) 1.27mm pitch hv9925 hv9925sg-g -g indicates package is rohs compliant (green) absolute maximum ratings sym parameter min typ max units conditions electrical characteristics (the speci?cations are at t a = 25c and v drain = 50v, unless otherwise noted.) parameter value supply voltage, v dd -0.3 to +10v pwmd, r sense voltage -0.3 to +10v supply current, i dd +5ma operating ambient temperature range -40 c to +85 c operating junction temperature range -40c to +125c storage temperature range -65c to +150c power dissipation @ 25c 800mw** all voltages referenced to gnd pin. **the power dissipation is given for the standard minimum pad without a heat slug, and based on r ja = 125c/w. r ja is the sum of the junction-to-case and case-to-ambient thermal resistance, where the latter is determined by the users board design. the junction-to-ambient thermal resistance is r ja = 105c/w when the part is mounted on a 0.04 in 2 pad of 1 oz copper, and r ja = 60c/w when mounted on a 1.0in 2 pad of 1 oz copper. v dd v dd regulator output - - 7.5 - v --- v uvlo v dd undervoltage threshold - 4.8 - - v --- v uvlo v dd undervoltage lockout hysteresis - - 200 - mv --- i dd operating supply current - - 300 500 a v dd(ext) = 8.5v output (drain) v br breakdown voltage * 475 - - v --- v drain v drain supply voltage - 20 - - v --- r on on-resistance - - 100 200 i drain = 50ma c drain output capacitance # - 1.0 5.0 pf v drain = 400v i sat drain saturation current - 100 150 - ma --- notes: * denotes the speci?cations which apply over the full operating ambient temperature range of -40c < t a < +85c. # denotes guaranteed by design. pin con?guration 8-lead soic (sg) (top view) heat slug is at ground potential. product marking 8-lead soic (sg) y = year sealed ww = week sealed l = lot number = green packaging yw w h9925 l l l l 1 2 3 4 8 7 6 5 rsense gn d pwm d vdd drai n drai n drai n nc heat slug
3 hv9925 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com functional block diagram current sense comparator v th threshold voltage - 0.435 0.470 0.525 v --- t blank leading edge blanking delay # 200 300 400 ns --- t on(min) minimum on time - - - 650 ns --- off-time generator t off off time - 8.0 10.5 13 s --- pwm dimming v pwmd,hi pwmd input high voltage - 2.0 - - v --- v pwmd,lo pwmd input low voltage - - - 0.8 v --- r pwmd pwmd pull down resistance - 100 200 300 k? v pwmd = 5.0v thermal shutdown t ot over temperature trip limit # - 140 - c --- t hyst temperature hysteresis # - 60 - c --- notes: * denotes the speci?cations which apply over the full operating ambient temperature range of -40c < t a < +85c. # denotes guaranteed by design. electrical characteristics (cont.) (the speci?cations are at t a = 25c and v drain = 50v, unless otherwise noted.) sym parameter min typ max units conditions
4 hv9925 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com typical performance characteristics (t j = 25 o c unless otherwise noted) threshold voltage v th vs te mp erature t j on resistance r on vs te mp erature t j of f ti me t of f vs te mp erature t j output capacitance c drai n vs v drain drain breakdown voltage bv vs t j output characteristics i drai n vs v drain 490 500 510 520 530 540 550 560 570 580 -4 0 - 15 10 35 60 85 11 0 j unc ti on te m p er at ur e, c drain br eakd ow n vo lt ag e, v 0 20 40 60 80 10 0 12 0 14 0 16 0 18 0 0 1 0 2 0 3 0 4 0 dra in vo lt ag e, v drain cu rre nt , ma 1 10 10 0 1 000 0 1 0 2 0 3 0 4 0 drai n vo lt ag e, v drai n ca pa ci ta nc e, pf 0. 460 0. 465 0. 470 0. 475 0. 480 0. 485 -4 0 - 15 10 35 60 85 110 j unc ti on te mp er at ur e, c cu rre nt se ns e thre s hol d, v 9. 0 9. 5 10. 0 10. 5 11. 0 11. 5 12. 0 12. 5 13. 0 -4 0 - 15 10 35 60 85 11 0 j unc ti on te mp er at ur e, c of f ti me , s 40 60 80 10 0 12 0 14 0 16 0 18 0 20 0 -4 0 - 15 10 35 60 85 110 ju nc ti on te mp er at ur e, c on re si stan ce , oh m t j = 25 o c t j = 125 o c
5 hv9925 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com functional description the hv9925 is a pwm peak current control ic for driving a buck converter topology in continuous conduction mode (ccm). the hv9925 controls the output current (rather than output voltage) of the converter that can be programmed by a single external resistor (r sense ), for the purpose of driving a string of light emitting diodes (led). an external enable input (pwmd) is provided that can be utilized for pwm dimming of an led string. the typical rising and falling edge transitions of the led current when using the pwm dimming feature of the hv9925 are shown in fig. 6 and fig. 7. when the input voltage of 20 to 400v appears at the drain pin, the internal linear regulator seeks to maintain a voltage of 7.5vdc at the v dd pin. until this voltage exceeds the internally programmed under-voltage threshold, no output switching occurs. when the threshold is exceeded, the integrated high-voltage switch turns on, pulling the drain low. a 200mv hysteresis is incorporated with the under- voltage comparator to prevent oscillation. when the voltage at r sense exceeds 0.47v, the switch turns off and the drain output becomes high impedance. at the same time, a one-shot circuit is activated that determines the off-time of the switch (10.5s typ.). a blanking delay of 300ns is provided upon the turn-on of the switch that prevents false triggering of the current sense comparator due to the leading edge spike caused by circuit parasitics. application information selecting l1 and d1 the required value of l1 is inversely proportional to the ripple current ?i o in it. setting the relative peak-to-peak ripple to 20~30% is a good practice to ensure noise immunity of the current sense comparator. l1 = (v o ? t off ) / i o (1) v o is the forward voltage of the led string. t off is the off- time of the hv9925. the output current in the led string (i o ) is calculated then as: i o = (v th / r sense ) - 1/2i o (2) where v th is the current sense comparator threshold, and r sense is the current sense resistor. the ripple current introduces a peak-to-average error in the output current setting that needs to be accounted for. due to the constant off-time control technique used in the hv9925, the ripple current is nearly independent of the input ac or dc voltage variation. therefore, the output current will remain unaffected by the varying input voltage. adding a ?lter capacitor across the led string can reduce the output current ripple even further, thus permitting a reduced value of l1. however, one must keep in mind that the peak-to-average current error is affected by the variation of t off . therefore, the initial output current accuracy might be sacri?ced at large ripple current in l1. another important aspect of designing an led driver with hv9925 is related to certain parasitic elements of the circuit, including distributed coil capacitance of l1, junction capacitance, and reverse recovery of the recti?er diode d1, capacitance of the printed circuit board traces c pcb and output capacitance c drain of the controller itself. these parasitic elements affect the ef?ciency of the switching converter and could potentially cause false triggering of the current sense comparator if not properly managed. minimizing these parasitics is essential for ef?cient and reliable operation of hv9925. coil capacitance of inductors is typically provided in the manufacturers data books either directly or in terms of the self-resonant frequency (srf). srf = 1 / (2(l ? c l )) where l is the inductance value, and c l is the coil capacitance. charging and discharging this capacitance every switching cycle causes high-current spikes in the led string. therefore, connecting a small capacitor c o (~10nf) is recommended to bypass these spikes. using an ultra-fast recti?er diode for d1 is recommended to achieve high ef?ciency and reduce the risk of false triggering of the current sense comparator. using diodes with shorter reverse recovery time t rr , and lower junction capacitance c j , achieves better performance. the reverse voltage rating v r of the diode must be greater than the maximum input voltage of the led lamp. the total parasitic capacitance present at the drain output of the hv9925 can be calculated as: c p = c drain + c pcb + c l + c j (3) when the switch turns on, the capacitance c p is discharged into the drain output of the ic. the discharge current is limited to about 150ma typically. however, it may become lower at increased junction temperature. the duration of the leading edge current spike can be estimated as: t spike = ((v in ? c p ) / i sat ) + t rr (4)
6 hv9925 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com in order to avoid false triggering of the current sense comparator, c p must be minimized in accordance with the following expression: (5) where t blank(min) is the minimum blanking time of 200ns, and v in(max) is the maximum instantaneous input voltage. the typical drain and r sense voltage waveforms are shown in fig. 3 and fig. 4. estimating power loss discharging the parasitic capacitance c p into the drain output of the hv9925 is responsible for the bulk of the switching power loss. it can be estimated using the following equation: (6) where f s is the switching frequency and i sat is the saturated drain current of the hv9925. the switching loss is the greatest at the maximum input voltage. disregarding the voltage drop at hv9925 and d1, the switching frequency is given by the following: f s = v in - v o (7) v in ? t off when the hv9925 led driver is powered from the full-wave recti?ed ac input, the switching power loss can be estimated as: (8) v ac is the input ac line voltage. the switching power loss associated with turn-off transitions of the drain output can be disregarded. due to the large amount of parasitic capacitance connected to this switching node, the turn-off transition occurs essentially at zero- voltage. when the hv9925 led driver is powered from dc input voltages, conduction power loss can be calculated as: p cond = (d ? i o 2 ? r on ) + i dd ? v in ? (1 - d) (9) where d = v o /v in is the duty ratio, r on is the on resistance, i dd is the internal linear regulator current. when the led driver is powered from the full-wave recti?ed ac line input, the exact equation for calculating the conduction loss is more cumbersome. however, it can be estimated using the following equation: p cond = (k c ? i o 2 ? r on ) + (k d ? i dd ? v ac ) (10) where v ac is the input ac line voltage. the coef?cients k c and k d can be determined from the minimum duty ratio d m =0.71vo/(v ac ). figure 1. conduction loss coef?cients k c and k d emi filter as with all off-line converters, selecting an input ?lter is critical to obtaining good emi. a switching side capacitor, albeit of small value, is necessary in order to ensure low impedance to the high frequency switching currents of the converter. as a rule of thumb, this capacitor should be approximately 0.1- 0.2 f/w of led output power. a recommended input ?lter is shown in figure 2 for the following design example. design example 1 let us design an hv9925 led lamp driver meeting the following speci?cations: input: universal ac, 85-264vac output current: 20ma load: string of 10 led (lw541c by osram v f = 4.1v max. each) the schematic diagram of the led driver is shown in figure 2. 0 0 .1 0. 2 0 .3 0. 4 0 .5 0. 6 0 .7 0. 1 0. 2 0. 3 0. 4 0. 5 0. 6 0. 7 k d d m ( ) k c d m ( ) d m
7 hv9925 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com step 1. calculating l1. the output voltage v o = 10 v f 41v (max.). use equation (1) assuming a 30% peak-to-peak ripple. l1 = (41v ? 10.5 s) / (0.3 ? 20ma) = 72mh select l1 68mh, i=30ma. typical srf = 170khz. calculate the coil capacitance. step 2. selecting d1 usually, the reverse recovery characteristics of ultra- fast recti?ers at i f = 20~50ma are not provided in the manufacturers data books. the designer may want to experiment with different diodes to achieve the best result. select d1 mur160 with v r = 600v, t rr 20ns (i f = 20ma, i rr = 100ma) and c j 8pf (v f >50v). step 3. calculate total parasitic capacitance using (3): cp = 5pf + 5pf +13pf + 8pf = 31pf step 4. calculating the leading edge spike duration using (4) and (5): step 5. estimating power dissipation in hv9925 at 264vac using (8) and (10) switching power loss: p switch 130mw minimum duty ratio: dm = (0.71 ? 41v) / 264v 0.11 conduction power loss: p cond = 0.20 ? (20ma) 2 ? 210? + 0.63 ? 200a ? 264v 50mw total power dissipation at v ac(max) : p total = 130mw + 50mw = 180mw step 6. selecting input capacitor c in output power = 41v ? 20ma = 820mw select c in ecq-e4104kf by panasonic (0.1f, 400v, metalized polyester film). design example 2 let us now design a pwm-dimmable led lamp driver using the hv9925: input: universal ac, 85-135vac output current: 50ma load: string of 12 led (power topled ? by osram, v f = 2.5v max. each) the schematic diagram of the led driver is shown in fig.3. we will use an aluminum electrolytic capacitor for c in in order to prevent interruptions of the led current at zero crossings of the input voltage. as a rule of thumb, 2~3f per each watt of the input power is required for c in in this case. step 1. calculating l1. the output voltage v o = 12 v f = 30v (max.). use equation (1) assuming a 30% peak-to-peak ripple. l1 = (30v ? 10.5s) / (0.3 ? 50ma) = 21mh select l1 22mh, i = 60ma. typical srf = 270khz. calculate the coil capacitance. step 2. selecting d1 select d1 es1g with v r = 400v, t rr 35ns and c j < 8.0pf. step 3. calculating total parasitic capacitance using (3): cp = 5pf + 5pf +15pf + 8pf = 33pf step 4. calculating the leading edge spike duration using (4) and (5): step 5. estimating power dissipation in hv9925 at 135vac using (6), (7) and (9) 68 10.5s 33ns 102ns 33pf
8 hv9925 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com switching power loss: p switch = (33pf ? (135v) 2 + 135v ? 2 x 100ma ? 35ns) ? 80khz 2 p switch 78mw minimum duty ratio: d m = 30v / (135v ? 2) 0.16 conduction power loss: p cond = 170mw total power dissipation in hv9925: p total = 78mw + 170mw = 248mw step 6. selecting input capacitor c in output power = 30v ? 50ma = 1.5w select c in 3.3f, 250v. figure 3. 85-135vac led lamp driver with pwm dimming figure 2. universal 85-264vac led lamp driver (i o = 20ma, v o = 50v) from example 1 ( ) 10.5s 80khz
9 hv9925 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com figure 4. switching waveforms. ch1: v rsense , ch2: v drain figure 5. switch-on transition C leading edge spike. ch1: vr sense , ch2: v drain figure 6. pwm dimming C rising edge. ch4: 10i out figure 7. pwm dimming C falling edge. ch4: 10iout pin # function description 1 rsense source terminal of the output switching mosfet provided for current sense resistor connection. 2 gnd common connection for all circuits. 3 pwmd pwm dimming input to the ic. 4 vdd power supply pin for internal control circuits. bypass this pin with a 0.1uf low impedance capacitor . 5 nc no connection. 6 drain drain terminal of the output switching mosfet and a linear regulator input. 7 8 pin description
supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate product liability indemnification insurance agreement. supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. no responsibility is assumed for possible omissions and inaccuracies. circuitry and specifications are subject to change without notice. for the latest product specifications refer to the supertex inc. website: http//www .supertex.com . ?2008 all rights reserved. unauthorized use or reproduction is prohibited . 1235 bordeaux drive, sunnyvale, ca 9408 9 te l: 408-222-8888 www .supertex.com 10 hv9925 (the package drawing(s) in this data sheet may not re?ect the most current speci?cations. for the latest package outline information go to http://www.supertex.com/packaging.htm l .) doc.# dsfp-hv9925 a091708 8-lead soic (narrow body w/heat slug) package outline (sg) 4.90x3.90mm body, 1.70mm height (max), 1.27mm pitch symbol a a1 a2 b d d1 e e1 e2 e h l l1 l2 1 dimension (mm) min 1.25* 0.00 1.25 0.31 4.80* 3.30 ? 5.80* 3.80* 2.29 ? 1.27 bsc 0.25 0.40 1.04 ref 0.25 bsc 0 o 5 o nom - - - - 4.90 - 6.00 3.90 - - - - - max 1.70 0.15 1.55* 0.51 5.00* 3.81 ? 6.20* 4.00* 2.79 ? 0.50 1.27 8 o 15 o jedec registration ms-012, variation ba, issue e, sept. 2005. * this dimension is not speci?ed in the original jedec drawing. the value listed is for reference only. ? this dimension is a non-jedec dimension. drawings not to scale. supertex doc. #: dspd-8sosg, version c090408. d seating plane gaug e plane l l1 l2 to p v iew side v iew vi ew a - a vi ew b vi ew b 1 e1 e a a2 a1 a a seating plane e b h h 8 1 d1 e2 bottom vi ew expose d therma l pad zone note 1 note 1 (index area d/2 x e1/2) 8 1 notes: this chamfer feature is optional. if it is not present, then a pin 1 identi?er must be located in the index area indicated. the pin 1 identi?er can be: a molded mark/identi?er; an embedded metal marker; or a printed indicator. 1.
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